1. Field of the Invention
The present invention relates to a semiconductor device in which a metal insulator semiconductor (MIS) transistor is formed, and more particularly to a semiconductor device having a shared contact for connection between a source/drain region and a gate electrode.
2. Description of the Related Art
Recently, in the field of semiconductor devices such as a static RAM (SRAM) formed on a semiconductor substrate, a configuration provided with a shared contact for connection between a source/drain region and a gate electrode via a contact has been proposed (see Jpn. Pat. Appln. KOKAI Publication No. 2005-158898 or 2003 Symposium on VLSI Technology Digest of Technical Papers, pages 13 and 14).
This kind of shared contact has a hole greater in diameter than a normal contact hole because of the need to connect the source/drain region and the gate electrode. A shared contact having a hole greater in diameter has an etching rate higher than a normal contact hole. Therefore, when a shared contact and a normal contact are simultaneously processed, a shared contact having a hole greater in diameter often penetrates from a sidewall insulator film (sidewall spacer) of a gate electrode. When the shared contact penetrates from the sidewall spacer, the shared contact is brought into contact with an extension region of the source/drain region. Since the extension region is extremely thin, when the shared contact is made into contact with the extension region, junction leakage may occur.
In order to avoid this problem, a method of arranging a gate electrode on an element isolation insulating film and forming a contact in this part has been proposed (2006 IEDM Technical Digest Pages 685-688). This method, however, involves a problem that the contact resistance increases because of a small contact area of a shared contact. Further, securing a sufficient contact area prevents miniaturization of elements.
Another method has been proposed. According to the method, a sidewall insulating film of a gate electrode is removed and then a silicide layer extending from the top surface of the substrate to the side surface of the gate electrode is formed, thereby connecting the side surface of the gate electrode and a source/drain region via the silicide layer (see Jpn. Pat. Appln. KOKAI Publication No. 2007-27348). This method, however, requires additional steps for forming a shared contact, which results in complication of the process.